Infineon RISC-V for Automotive at Hot Chips 2026

ServeTheHome — since we covered many of the other talks, we also had a draft of the Infineon RISC-V for Automotive talk for Hot Chips 2026 ready. We figured, why not give this talk some exposure too?

Let us get to it. Infineon opened with the compute demands facing automotive microcontrollers. Chassis, powertrain, and ADAS applications together want real-time low latency, power efficiency, and security on top of the highest integrity levels and functional safety, all on a single part. Architecture work starts with the move from domain architecture toward zone control units and eventually full car computers. Former domain controllers evolve into central car computers handling ADAS, infotainment, and vehicle motion, while body and comfort functions consolidate into zones that share wiring and cut harness weight and cost. In automotive, the wiring harness is a huge deal. Infineon lays out the real-time areas that every automotive part must handle. Fast control loops such as E-motor control need deadlines under 10 ms and interrupt latencies in the tens of nanoseconds, while strategic functions like vehicle management tolerate multiple seconds and 10 ms interrupt latency. We heard some of this in the Waymo Sensor Fusion Processor at Hot Chips 2026 talk. With zone architecture in place, the open question is how much intelligence each zone controller should carry. Path A uses optimized multi-domain zone controllers that partially consolidate endpoint ECUs and support local power distribution, while Path B keeps zone controllers as low-complexity I/O aggregators with no intelligence of their own. Infineon says that Option A is the more advantageous path. Keeping local tactics and latency-sensitive control loops in the zone while global strategies and OEM value sit in the central compute shrinks the vehicle attack surface, eases maintenance, and cuts system cost by consolidating endpoint ECUs and decentralizing power distribution. Real zone controllers integrate workloads with very different compute demands. Real-time control, DSP and AI inference, low-power service layers, and audio processing all land on one part, so the compute architecture must scale across high-end multi-domain zones and low-end body zones while still delivering good power, performance, and area.